BCD to 7-segment decoder
Turns a 4-bit BCD digit into the seven segment lines that draw it. The input is a number from 0 to 9; the outputs a through g each drive one bar of the display. It exists so you do not have to work out, gate by gate, which bars light up for which digit — that mapping is the whole component.
The full digit map
Wire a 4-bit input to the decoder and its seven outputs to a 7-segment display. Count the input from 0 to 9 and each digit forms. The table lists which segments are on for each digit; segment a is the top bar, b and c the right-hand pair going down, d the bottom, e and f the left-hand pair, and g the middle.
| Digit | a | b | c | d | e | f | g |
|---|---|---|---|---|---|---|---|
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 |
| 1 | 0 | 1 | 1 | 0 | 0 | 0 | 0 |
| 2 | 1 | 1 | 0 | 1 | 1 | 0 | 1 |
| 3 | 1 | 1 | 1 | 1 | 0 | 0 | 1 |
| 4 | 0 | 1 | 1 | 0 | 0 | 1 | 1 |
| 5 | 1 | 0 | 1 | 1 | 0 | 1 | 1 |
| 6 | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
| 7 | 1 | 1 | 1 | 0 | 0 | 0 | 0 |
| 8 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| 9 | 1 | 1 | 1 | 1 | 0 | 1 | 1 |
A counting display
Put a clock into a counter, set the counter's maximum to 9, and send its value through the decoder to the display. You now have a decade counter that shows the digit rather than four LEDs you have to decode in your head. Slow the clock down to a second per step to watch it roll over from 9 back to 0.
What happens past 9
A 4-bit input can carry 16 values, but BCD only defines ten of them. The codes 1010 through 1111 are outside the digit set, and what a decoder shows for them is a property of that particular part rather than of BCD — classic TTL decoders each display their own set of partial shapes. Do not design around whatever appears there. If your counter can exceed 9, clamp it or detect the overflow and carry into a second digit, which is exactly what a multi-digit display does.
Citations
- Texas Instruments. (2016). SN54LS47, SN74LS47 BCD-to-seven-segment decoders/drivers [Data sheet]. Reference 1
- Mano, M. M., & Ciletti, M. D. (2018). Digital design: With an introduction to the Verilog HDL, VHDL, and SystemVerilog (6th ed.). Pearson. Reference 2